Re: [PATCH 0/2] Add support for Gunyah Watchdog
From: Pavan Kondeti <hidden>
Date: 2025-09-04 17:06:05
Also in:
linux-arm-msm, linux-watchdog, lkml
Subsystem:
arm/qualcomm mailing list, arm/qualcomm support, the rest · Maintainers:
Bjorn Andersson, Konrad Dybcio, Linus Torvalds
On Thu, Sep 04, 2025 at 08:53:14AM -0500, Bjorn Andersson wrote:
On Thu, Sep 04, 2025 at 02:48:03PM +0530, Pavan Kondeti wrote:quoted
On Thu, Sep 04, 2025 at 09:13:23AM +0200, Neil Armstrong wrote:quoted
On 03/09/2025 21:33, Hrishabh Rajput via B4 Relay wrote:quoted
Gunyah is a Type-I hypervisor which was introduced in the patch series [1]. It is an open source hypervisor. The source repo is available at [2]. The Gunyah Hypervisor doesn't allow its Virtual Machines to directly access the MMIO watchdog. It either provides the fully emulated MMIO based watchdog interface or the SMC-based watchdog interface depending on the hypervisor configuration. The SMC-based watchdog follows ARM's SMC Calling Convention (SMCCC) version 1.1 and uses Vendor Specific Hypervisor Service Calls space. This patch series adds support for the SMC-based watchdog interface provided by the Gunyah Hypervisor. The driver supports start/stop operations, timeout and pretimeout configuration, pretimeout interrupt handling and system restart via watchdog. This series is tested on SM8750 platform.Would this driver work on older platforms like SM8550 & SM8650 ?This driver should work on 8550 and 8650 too as long as the hypervisor overlay is applied to the device tree which happens in the bootloader.You have easy access to 8550 and 8650 MTP/QRD devices, please give us a definitive answer.
Thanks for asking this question. I believe the overlay part needs some discussion here. I have tried this series on 8550 MTP. The overlay failed, so watchdog device did not probe. same is the case with 8750 too. It works only after applying this patch. I will test and report my observation on 8650 later.
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 140b0b2abfb5..b200e8faa6df 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile@@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 +DTC_FLAGS := -@ dtb-$(CONFIG_ARCH_QCOM) += apq8016-sbc.dtb apq8016-sbc-usb-host-dtbs := apq8016-sbc.dtb apq8016-sbc-usb-host.dtbo
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index eac8de4005d8..7536b1a4ec97 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi@@ -328,7 +328,7 @@ cluster_sleep_1: cluster-sleep-1 { }; firmware { - scm: scm { + scm: qcom_scm { compatible = "qcom,scm-sm8550", "qcom,scm"; qcom,dload-mode = <&tcsr 0x19000>; interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
@@ -4855,6 +4855,9 @@ compute-cb@8 { }; }; }; + + qcom_tzlog: tz-log { + }; }; thermal-zones {
@@ -5913,7 +5916,7 @@ trip-point2 { }; }; - timer { + arch_timer: timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
Thanks, Pavan