Thread (18 messages) 18 messages, 2 authors, 2025-09-01
STALE329d LANDED

[PATCH 02/15] arm64: dts: qcom: lemans: Add default GIC address cells

From: Krzysztof Kozlowski <hidden>
Date: 2025-08-22 12:04:30
Also in: linux-arm-msm, lkml
Subsystem: arm/qualcomm mailing list, arm/qualcomm support, the rest · Maintainers: Bjorn Andersson, Konrad Dybcio, Linus Torvalds

Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  lemans.dtsi:7623.3-7626.29: Warning (interrupt_map): /pcie@1c00000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@17a00000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <redacted>
---
 arch/arm64/boot/dts/qcom/lemans.dtsi | 1 +
 1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index 64f5378c6a4770cee2c7d76cde1098d7df17a24a..55eb2bc36b23dd61aae65f0160074637c8e7e1a2 100644
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -5866,6 +5866,7 @@ intc: interrupt-controller@17a00000 {
 			reg = <0x0 0x17a00000 0x0 0x10000>,     /* GICD */
 			      <0x0 0x17a60000 0x0 0x100000>;    /* GICR * 8 */
 			interrupt-controller;
+			#address-cells = <0>;
 			#interrupt-cells = <3>;
 			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 			#redistributor-regions = <1>;
-- 
2.48.1
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