RE: [PATCH v2 08/10] arm64: dts: exynos: axis: Add initial ARTPEC-8 SoC support
From: Ravi Patel <hidden>
Date: 2025-08-22 11:48:29
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linux-arm-kernel, linux-clk, linux-gpio, linux-samsung-soc, lkml
-----Original Message----- From: Krzysztof Kozlowski <krzk@kernel.org> Sent: 22 August 2025 12:09 To: Ravi Patel <redacted>; jesper.nilsson@axis.com; mturquette@baylibre.com; sboyd@kernel.org; robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org; s.nawrocki@samsung.com; cw00.choi@samsung.com; alim.akhtar@samsung.com; linus.walleij@linaro.org; tomasz.figa@gmail.com; catalin.marinas@arm.com; will@kernel.org; arnd@arndb.de Cc: ksk4725@coasia.com; kenkim@coasia.com; pjsin865@coasia.com; gwk1013@coasia.com; hgkim05@coasia.com; mingyoungbo@coasia.com; smn1196@coasia.com; pankaj.dubey@samsung.com; shradha.t@samsung.com; inbaraj.e@samsung.com; swathi.ks@samsung.com; hrishikesh.d@samsung.com; dj76.yang@samsung.com; hypmean.kim@samsung.com; linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-samsung- soc@vger.kernel.org; linux-arm-kernel@axis.com; linux-clk@vger.kernel.org; devicetree@vger.kernel.org; linux- gpio@vger.kernel.org; soc@lists.linux.dev Subject: Re: [PATCH v2 08/10] arm64: dts: exynos: axis: Add initial ARTPEC-8 SoC support On 21/08/2025 14:32, Ravi Patel wrote:quoted
From: SungMin Park <redacted> Add initial device tree support for Axis ARTPEC-8 SoC. This SoC contains 4 Cortex-A53 CPUs and several other peripheral IPs. Signed-off-by: SungMin Park <redacted> Signed-off-by: SeonGu Kang <redacted> Signed-off-by: Ravi Patel <redacted>...quoted
+ + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,No CPU mask?
Thanks for review and pointing out. Yes. You are right. I will add GIC_CPU_MASK_SIMPLE(4) in next version as this uses GICv2 (gic-400) not GICv3. This may be carried out from other exynos/fsd platforms I found below 2 related links. https://lkml.org/lkml/2025/6/13/1073 https://lkml.org/lkml/2023/11/28/403 Thanks, Ravi
quoted
+ <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + }; +};Best regards, Krzysztof