Thread (22 messages) 22 messages, 4 authors, 2025-08-13

Re: [PATCH v6 3/5] thermal: renesas: rzg3e: Add thermal driver for the Renesas RZ/G3E SoC

From: Geert Uytterhoeven <geert@linux-m68k.org>
Date: 2025-08-05 08:47:27
Also in: linux-pm, linux-renesas-soc, lkml

Hi John,

On Tue, 5 Aug 2025 at 10:27, John Madieu [off-list ref] wrote:
quoted
From: Geert Uytterhoeven <geert@linux-m68k.org>
On Thu, 22 May 2025 at 20:23, John Madieu [off-list ref]
wrote:
quoted
The RZ/G3E SoC integrates a Temperature Sensor Unit (TSU) block
designed to monitor the chip's junction temperature. This sensor is
connected to channel 1 of the APB port clock/reset and provides
temperature measurements.
quoted
It also requires calibration values stored in the system controller
registers for accurate temperature measurement. Add a driver for the
Renesas RZ/G3E TSU.
quoted
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
Thanks for your patch!

The TSUs in RZ/V2H and RZ/V2N seem to be identical to the one in RZ/G3E.
However, RZ/V2H and RZ/V2N have two instances, while RZ/G3 has only one.
This is true.
quoted
quoted
--- /dev/null
+++ b/drivers/thermal/renesas/rzg3e_thermal.c
@@ -0,0 +1,443 @@
quoted
+/* SYS Trimming register offsets macro */ #define SYS_TSU_TRMVAL(x)
+(0x330 + (x) * 4)
RZ/V2H and RZ/V2N have a second set of trim values for the second TSU
instance.  So I guess you want to specify the offset in DT instead.
What do you think of 'renesas,tsu-channel' property or alike
Property to specify the channel being used ?
While I agree instance IDs canbe useful (sometimes), the DT maintainers
do not like them very much, cfr. commit 6a57cf210711c068 ("docs: dt:
writing-bindings: Document discouraged instance IDs"), which prefers
cell/phandle arguments.

For this particular case:
  1. The instance ID for the single TSU on RZ/G3E would be one, not zero
     (oh, the SYS_LSI_OTPTSU1TRMVAL[01] register names do contain "TSU1"),
  2. It will break the moment a new SoC is released that stores trim
     values at different offsets in the SYSC block.

Hence a property containing a SYSC phandle and register offset sounds
better to me.
Thoughts?

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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