On Tue, Jul 29, 2025 at 04:59:09PM +0100, Prabhakar wrote:

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Update the rzv2h_wdt driver to obtain the clock division ratio (`cks_div`)
from OF match data instead of using a hardcoded value. This allows the
driver to support SoCs where the clock divider differs from the default
value of 256.

This change is a preparatory step for supporting the RZ/T2H SoC, which
requires a divider value of 8192.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

I'd think this should be merged with patch 2, but for the change itself:

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>