On 31-Jul-25 12:25 PM, Krzysztof Kozlowski wrote:

On Wed, Jul 30, 2025 at 04:25:06PM +0200, Krzysztof Kozlowski wrote:

quoted

On 30/07/2025 15:53, Nitin Rawat wrote:

quoted

On 7/30/2025 6:05 PM, Krzysztof Kozlowski wrote:

quoted

The binding for Qualcomm SoC UFS controllers grew and it will grow
further.  It already includes several conditionals, partially for
difference in handling encryption block (ICE, either as phandle or as IO
address space) but it will further grow for MCQ.

See also: lore.kernel.org/r/20250730082229.23475-1-quic_rdwivedi@quicinc.com

The question is whether SM8650 and SM8750 should have their own schemas,
but based on bindings above I think all devices here have MCQ?

Best regards,
Krzysztof

Hi Krzysztof,

If I understand correctly, you're splitting the YAML files based on MCQ 
(Multi-Circular Queue) support:

Not entirely, I don't know which devices support MCQ. I split based on
common parts in the binding.

I found the docs, so I'll send v2 with MCQ also separated.

Hi Krzysztof,

Regarding my patch: lore.kernel.org/r/20250730082229.23475-1-quic_rdwivedi@quicinc.com
I will post the next patchset on the top of your latest(v2) binding patch. 
Please let me know if you have any concern.

Thanks,
Ram.

Best regards,
Krzysztof