On 7/14/25 5:17 PM, Bryan O'Donoghue wrote:
On 14/07/2025 15:58, Vladimir Zapolskiy wrote:
quoted
This proposed device node scheme does not solve the known and already
discussed technical issue expectedly, namely there is no given way
to describe a combo mode hardware configuration, when two independant
sensors are wired to the same CSIPHY. This is an unsolvable problem
with this design.
I think that is genuinely something we should handle in camss-csid.c maybe with some meta-data inside of the ports/endpoints..
quoted
Sensors are conneced to CSIPHY IP blocks, CSIPHY is connected to CSID.
My understanding of best practice is data-endpoints go into the consumer not the PHY.
At least in the case of USB, the PHY's of_graph includes signals that go
through said PHY (so HS for HS phys, RXTX for SS PHYs)
Konrad
These are PHYs with their own SoC pins and voltage rails. They should look like other PHYs in qcom and across DT, IMO.
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bod