Re: [PATCH v3 2/5] riscv: dts: allwinner: d1s-t113: Add pinctrl's required by NetCube Systems Nagami SoM
From: Chen-Yu Tsai <hidden>
Date: 2025-07-08 16:36:25
Also in:
linux-arm-kernel, linux-riscv, linux-sunxi, lkml
On Tue, Jul 8, 2025 at 8:35 AM Lukas Schmid [off-list ref] wrote:
quoted hunk ↗ jump to hunk
Added the following pinctrl's used by the NetCube Systems Nagami SoM * i2c2_pins * i2c3_pins * i2s1_pins, i2s1_din_pins, i2s1_dout_pins * spi1_pins Signed-off-by: Lukas Schmid <redacted> --- .../boot/dts/allwinner/sunxi-d1s-t113.dtsi | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+)diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index e4175adb0..8dc3deccb 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi@@ -78,6 +78,36 @@ dsi_4lane_pins: dsi-4lane-pins { function = "dsi"; }; + /omit-if-no-ref/ + i2c2_pins: i2c2-pins { + pins = "PD20", "PD21"; + function = "i2c2"; + }; + + /omit-if-no-ref/ + i2c3_pins: i2c3-pins { + pins = "PG10", "PG11"; + function = "i2c3"; + }; + + /omit-if-no-ref/ + i2s1_pins: i2s1-pins { + pins = "PG12", "PG13"; + function = "i2s1"; + }; + + /omit-if-no-ref/ + i2s1_din_pins: i2s1-din-pins { + pins = "PG14"; + function = "i2s1_din"; + }; + + /omit-if-no-ref/ + i2s1_dout_pins: i2s1-dout-pins { + pins = "PG15"; + function = "i2s1_dout"; + }; + /omit-if-no-ref/ lcd_rgb666_pins: lcd-rgb666-pins { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5",@@ -126,6 +156,12 @@ spi0_pins: spi0-pins { function = "spi0"; }; + /omit-if-no-ref/ + spi1_pins: spi1-pins { + pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15";
Could you split out the WP and HOLD pins as separate nodes. They aren't strictly needed for SPI, and folks might have designs that use the two pins for other purposes. Thanks ChenYu
+ function = "spi1";
+ };
+
/omit-if-no-ref/
uart1_pg6_pins: uart1-pg6-pins {
pins = "PG6", "PG7";
--
2.39.5