[PATCH v3 01/17] media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/V2H(P) SoC
From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Date: 2025-02-26 15:25:23
Also in:
linux-media, linux-renesas-soc, lkml
Subsystem:
media input infrastructure (v4l/dvb), open firmware and flattened device tree bindings, the rest · Maintainers:
Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> The MIPI CSI-2 block on the Renesas RZ/V2H(P) SoC is similar to the one found on the Renesas RZ/G2L SoC, with the following differences: - A different D-PHY - Additional registers for the MIPI CSI-2 link - Only two clocks Add a new compatible string, `renesas,r9a09g057-csi2`, for the RZ/V2H(P) SoC. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> --- Changes since v1: - Dropped empty line as suggested by LPinchart - Fixed minItems into else conditional block as suggested by RHerring Changes since v2: - Collected tags - Fixed CRU_CMN_RSTB description as suggested by LPinchart .../bindings/media/renesas,rzg2l-csi2.yaml | 60 ++++++++++++++----- 1 file changed, 45 insertions(+), 15 deletions(-)
diff --git a/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml b/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml
index 7faa12fecd5b..784ba88c9b8f 100644
--- a/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml
+++ b/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml@@ -17,12 +17,14 @@ description: properties: compatible: - items: - - enum: - - renesas,r9a07g043-csi2 # RZ/G2UL - - renesas,r9a07g044-csi2 # RZ/G2{L,LC} - - renesas,r9a07g054-csi2 # RZ/V2L - - const: renesas,rzg2l-csi2 + oneOf: + - items: + - enum: + - renesas,r9a07g043-csi2 # RZ/G2UL + - renesas,r9a07g044-csi2 # RZ/G2{L,LC} + - renesas,r9a07g054-csi2 # RZ/V2L + - const: renesas,rzg2l-csi2 + - const: renesas,r9a09g057-csi2 # RZ/V2H(P) reg: maxItems: 1
@@ -31,16 +33,24 @@ properties: maxItems: 1 clocks: - items: - - description: Internal clock for connecting CRU and MIPI - - description: CRU Main clock - - description: CRU Register access clock + oneOf: + - items: + - description: Internal clock for connecting CRU and MIPI + - description: CRU Main clock + - description: CRU Register access clock + - items: + - description: CRU Main clock + - description: CRU Register access clock clock-names: - items: - - const: system - - const: video - - const: apb + oneOf: + - items: + - const: system + - const: video + - const: apb + - items: + - const: video + - const: apb power-domains: maxItems: 1
@@ -48,7 +58,8 @@ properties: resets: items: - description: CRU_PRESETN reset terminal - - description: CRU_CMN_RSTB reset terminal + - description: + CRU_CMN_RSTB reset terminal (all but RZ/V2H(P)) or D-PHY reset (RZ/V2H(P)) reset-names: items:
@@ -101,6 +112,25 @@ required: - reset-names - ports +allOf: + - if: + properties: + compatible: + contains: + const: renesas,r9a09g057-csi2 + then: + properties: + clocks: + maxItems: 2 + clock-names: + maxItems: 2 + else: + properties: + clocks: + minItems: 3 + clock-names: + minItems: 3 + additionalProperties: false examples:
--
2.43.0