Thread (17 messages) 17 messages, 5 authors, 2025-02-22

Re: [PATCH 3/4] arm64: dts: rockchip: Add HDMI1 PHY PLL clock source to VOP2 on RK3588

From: Johannes Erdfelt <hidden>
Date: 2025-02-22 06:15:45
Also in: dri-devel, linux-arm-kernel, linux-rockchip, lkml

On Tue, Feb 18, 2025, Heiko Stübner [off-list ref] wrote:
quoted hunk ↗ jump to hunk
I was more thinking about fixing the correct thing, with something like:

----------- 8< ----------
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index cf7720b9172f..50faafbf5dda 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -5258,6 +5258,10 @@ of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec)
        if (!clkspec)
                return ERR_PTR(-EINVAL);

+       /* Check if node in clkspec is in disabled/fail state */
+       if (!of_device_is_available(clkspec->np))
+               return ERR_PTR(-ENOENT);
+
        mutex_lock(&of_clk_mutex);
        list_for_each_entry(provider, &of_clk_providers, link) {
                if (provider->node == clkspec->np) {
----------- 8< ----------
Because right now the clk framework does not handle nodes in
failed/disabled state and would defer indefinitly.
I've been testing the recent patches Jimmy Hon has posted to add the
Orange Pi 5 Ultra DT and I ran into this bug. The Ultra uses HDMI1 for
the HDMI TX.

This patch successfully fixes the issue I was seeing.

JE
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