Re: [PATCH v3 2/4] net: stmmac: dwmac-qcom-ethqos: Mask PHY mode if configured with rgmii-id
From: Maxime Chevallier <maxime.chevallier@bootlin.com>
Date: 2025-01-21 13:17:38
Also in:
linux-arm-kernel, linux-arm-msm, lkml, netdev
Hi, On Tue, 21 Jan 2025 15:54:54 +0800 Yijie Yang [off-list ref] wrote:
quoted hunk ↗ jump to hunk
The Qualcomm board always chooses the MAC to provide the delay instead of the PHY, which is completely opposite to the suggestion of the Linux kernel. The usage of phy-mode in legacy DTS was also incorrect. Change the phy_mode passed from the DTS to the driver from PHY_INTERFACE_MODE_RGMII_ID to PHY_INTERFACE_MODE_RGMII to ensure correct operation and adherence to the definition. To address the ABI compatibility issue between the kernel and DTS caused by this change, handle the compatible string 'qcom,qcs404-evb-4000' in the code, as it is the only legacy board that mistakenly uses the 'rgmii' phy-mode. Signed-off-by: Yijie Yang <redacted> --- .../net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-)diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 2a5b38723635b5ef9233ca4709e99dd5ddf06b77..e228a62723e221d58d8c4f104109e0dcf682d06d 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c@@ -401,14 +401,11 @@ static int ethqos_dll_configure(struct qcom_ethqos *ethqos) static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) { struct device *dev = ðqos->pdev->dev; - int phase_shift; + int phase_shift = 0; int loopback; /* Determine if the PHY adds a 2 ns TX delay or the MAC handles it */ - if (ethqos->phy_mode == PHY_INTERFACE_MODE_RGMII_ID || - ethqos->phy_mode == PHY_INTERFACE_MODE_RGMII_TXID) - phase_shift = 0; - else + if (ethqos->phy_mode == PHY_INTERFACE_MODE_RGMII_ID) phase_shift = RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN;
So this looks like a driver modification to deal with errors in devicetree, and these modifications don't seem to be correct. You should set RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN (i.e. adding a delay n the TX line) when the PHY does not add internal delays on that line (so, when the mode is rgmii or rgmii-rxid. The previous logic looks correct in that regard. Can you elaborate a bit more on the issue you are seeing ? On what hardware is this happening ? What's the RGMII setup used (i.e. which PHY, which mode, is there any delay lines on the PCB ?) Thanks, Maxime