Re: [PATCH v4 14/19] arm64: dts: mediatek: asurada: Enable PCIe and add WiFi

On Mon, Jan 06, 2025 at 02:56:07PM -0600, Bjorn Helgaas wrote:

[+cc Mani]

On Mon, Jan 06, 2025 at 04:10:32PM -0300, Nícolas F. R. A. Prado wrote:

quoted

On Fri, Jan 03, 2025 at 03:14:46PM -0600, Bjorn Helgaas wrote:

quoted

On Wed, Jun 29, 2022 at 11:59:51AM -0400, Nícolas F. R. A. Prado wrote:

quoted

Enable MT8192's PCIe controller and add support for the MT7921e WiFi
card that is present on that bus for the Asurada platform.

quoted

+&pcie {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie_pins>;
+
+	pcie0: pcie@0,0 {
+		device_type = "pci";
+		reg = <0x0000 0 0 0 0>;
+		num-lanes = <1>;
+		bus-range = <0x1 0x1>;

Hi Nícolas, what's the purpose of this bus-range?  IIUC this describes
a Root Port, where we can read and configure the secondary/subordinate
bus numbers from the RP config space, so it seems like we don't need
to describe them here.

Hi Bjorn,

that was carried over from the downstream sources. I just tried
removing it and indeed I don't see any difference in the PCI log
messages, or the bus number, and the wifi works just fine. I can
send a follow up patch removing it.

There might be a DTC check issue if we remove the bus-range:
https://lore.kernel.org/r/20250105101612.t6c4pw5uxhb5rdde@thinkpad (local)

Ah yes, indeed there is:

arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi:643.18-647.5: Warning (pci_device_bus_num): /soc/pcie@11230000/pcie@0,0/wifi@0,0: PCI bus number 1 out of range, expected (0 - 0)

Thanks,
Nícolas

We might need to figure out how to resolve that first.

Bjorn