Re: [PATCH 02/16] dt-bindings: soc: renesas: renesas,rzg2l-sysc: Add #reset-cells for RZ/G3S
From: claudiu beznea <claudiu.beznea@tuxon.dev>
Date: 2024-08-23 07:59:44
Also in:
linux-arm-kernel, linux-clk, linux-phy, linux-pm, linux-renesas-soc, linux-usb, lkml
On 22.08.2024 19:44, Conor Dooley wrote:
On Thu, Aug 22, 2024 at 05:42:57PM +0100, Conor Dooley wrote:quoted
On Thu, Aug 22, 2024 at 06:27:47PM +0300, Claudiu wrote:quoted
From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> The RZ/G3S System controller has registers to control signals that need to be de-asserted/asserted before/after different SoC areas are power on/off. This signals are implemented as reset signals. For this document the #reset-cells property. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> --- .../bindings/soc/renesas/renesas,rzg2l-sysc.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml index 4386b2c3fa4d..6b0bb34485d9 100644 --- a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml +++ b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml@@ -42,12 +42,28 @@ properties: - const: cm33stbyr_int - const: ca55_deny + "#reset-cells": + const: 1 + required: - compatible - reg additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + const: renesas,r9a08g045-sysc + then: + required: + - "#reset-cells"Given this is new required property on an existing platform, I'd expect some mention of why it used to be okay to not have this but is now required. Did firmware or a bootloader stage take things out of reset?Reading a bit more into the series, the peripherals in question were just never used nor did a driver for the sysc exist, so there's neither
Exactly.
explanation of prior behaviour nor concerns about compatibility?
The newly introduced sysc driver is probed only for RZ/G3S and used to control the USB, PCIe signals though reset control driver (registered by sysc driver on auxiliary bus) and to identify the chip. The intention is to later migrate the chip identification support for the rest of RZ/G2 devices to this new driver and add more functionalities, when/if needed. Thank you, Claudiu Beznea
quoted
quoted
+ else: + properties: + "#reset-cells": false + examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> -- 2.39.2