Thread (16 messages) 16 messages, 3 authors, 2024-08-12

RE: [PATCH v4 4/6] ata: ahci_imx: Add 32bits DMA limit for i.MX8QM AHCI SATA

From: Hongxing Zhu <hongxing.zhu@nxp.com>
Date: 2024-08-09 08:45:15
Also in: imx, linux-arm-kernel, linux-ide, lkml, stable

-----Original Message-----
From: Niklas Cassel <cassel@kernel.org>
Sent: 2024年8月9日 0:24
To: Frank Li <frank.li@nxp.com>
Cc: Hongxing Zhu <hongxing.zhu@nxp.com>; tj@kernel.org;
dlemoal@kernel.org; robh@kernel.org; krzk+dt@kernel.org;
conor+dt@kernel.org; shawnguo@kernel.org; s.hauer@pengutronix.de;
festevam@gmail.com; linux-ide@vger.kernel.org; stable@vger.kernel.org;
devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
linux-arm-kernel@lists.infradead.org; imx@lists.linux.dev;
kernel@pengutronix.de
Subject: Re: [PATCH v4 4/6] ata: ahci_imx: Add 32bits DMA limit for i.MX8QM
AHCI SATA

On Thu, Aug 08, 2024 at 10:03:17AM -0400, Frank Li wrote:
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On Thu, Aug 08, 2024 at 12:35:01AM +0200, Niklas Cassel wrote:
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On Fri, Aug 02, 2024 at 02:30:45AM +0000, Hongxing Zhu wrote:
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Hi Niklas:
I'm so sorry to reply late.
About the 32bit DMA limitation of i.MX8QM AHCI SATA.
It's seems that one "dma-ranges" property in the DT can let
i.MX8QM SATA  works fine in my past days tests without this commit.
How about drop these driver changes, and add "dma-ranges" for i.MX8QM
SATA?
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Thanks a lot for your kindly help.
Hello Richard,

did you try my suggested patch above?


If you look at dma-ranges:
https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fde
vicetree-specification.readthedocs.io%2Fen%2Flatest%2Fchapter2-devic
etree-basics.html%23dma-ranges&data=05%7C02%7Chongxing.zhu%40nxp.co
m
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%7Cb18159f7aa424f3e0d8f08dcb7c68f38%7C686ea1d3bc2b4c6fa92cd99c
5c3016
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35%7C0%7C0%7C638587310631122078%7CUnknown%7CTWFpbGZsb3d8eyJ
WIjoiMC4w
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7C&
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sdata=uYJFF7Mci4j068LF1Ew8qrFvc1pzrmWhJS0UqaWtvYQ%3D&reserved=0
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"dma-ranges" property should be used on a bus device node (such as
PCI host bridges).
Yes, 32bit is limited by internal bus farbic, not AHCI controller.
If the limit is by the interconnect/bus, then the limit will affect all devices
connected to that bus, i.e. both the PCIe controller and the AHCI controller, and
using "dma-ranges" in that case is of course correct.

I guess I'm mostly surprised that i.MX8QM doesn't already have this property
defined in its device tree.

Anyway, please send a v5 of this series without the patch in $subject, and we
should be able to queue it up for 6.12.
Hi Niklas:
Thank you very much.
I had already sent out the v5 series patch-set a few days ago.
https://patchwork.kernel.org/project/linux-arm-kernel/cover/1722581213-15221-1-git-send-email-hongxing.zhu@nxp.com/
BTW, I'm a little confused about " without the patch in $subject,".
Do you mean to remove the "PATCH" from Subject of each patch?
v5:
Subject: [PATCH v5 1/5] dt-bindings: ata: Add i.MX8QM AHCI compatible string
v6 without patch in $subject:
Subject: [ v6 1/5] dt-bindings: ata: Add i.MX8QM AHCI compatible string
If yes, I can do that and add Frank's reviewed-by tag in the v6 series.

Best Regards
Richard Zhu

Kind regards,
Niklas
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