On Sun, Aug 04, 2024 at 01:27:35PM +0200, Diederik de Haas wrote:
On Saturday, 3 August 2024 14:55:10 CEST Yao Zi wrote:
quoted
+ gic: interrupt-controller@fed01000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x0 0xfed01000 0 0x1000>,
+ <0x0 0xfed02000 0 0x2000>,
+ <0x0 0xfed04000 0 0x2000>,
+ <0x0 0xfed06000 0 0x2000>;
+ interrupts = <GIC_PPI 9
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ uart0: serial@ff9f0000 {
+ compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart";
+ reg = <0x0 0xff9f0000 0x0 0x100>;
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clock-frequency = <24000000>;
+ status = "disabled";
+ };
The properties should be sorted as follows:
- compatible
- reg
- <other properties sorted alphabetically>
- status
This also applies to the other blocks which I didn't quote.
Thanks, will be fixed in next revision.
Best regards,
Yao Zi