Re: [PATCH] dt-bindings: fpga: microchip,mpf-spi-fpga-mgr: document CPOL/CPHA support

On 24-02-22, Conor Dooley wrote:

On Wed, Feb 21, 2024 at 08:12:47PM +0100, Marco Felsch wrote:

quoted

Microchip FPGAs can communicate in different modes, so document them to
avoid dt-validate warnings.

Are you sure it can "communicate in different modes"?

No I'm not but I didn't found an overview within the FPGA datasheet [1]
which modes are supported. What I did found was an note which says:

"""
1. Parameters are referenced to the active edge of SCK, which depends on
the configured SPI protocol (for example, Motorola SPI mode uses rising
edge as active edge if SPO = 0)
"""

Therefore I thought that this can be configured somehow differently.

[1] https://www.microsemi.com/document-portal/doc_view/136519-ds0141-polarfire-fpga-datasheet

The documentation actually says "Motorla SPI Mode 3 is required to
communicate with M2S, M2GL, and MPF devices using dedicated system
controller SPI port" with mode 3 being SPO = SPH = 1:
https://www.microsemi.com/document-portal/doc_view/137543-spi-directc-sp1-v2-0-user-guide

Thanks for the Pointer, there are plenty documents for the Polarfire
FPGA.

I suspect the answer is that it can actually communicate in different
modes (because I don't recall setting those options), but the binding
should enforce the correct way of doing it IMO.

Sure, I will rephrase my commit message to:

"""
dt-bindings: fpga: microchip,mpf-spi-fpga-mgr: document CPOL/CPHA

Using the dedicated system controller SPI port requires Motorola SPI
Mode 3 according the SPI-DirectC v2.0 User Guid [1]. So require the
spi-cpol and spi-cpha to be set.

[1] https://www.microsemi.com/document-portal/doc_view/137543-spi-directc-sp1-v2-0-user-guide
"""

Regards,
  Marco

Cheers,
Conor.

quoted

Signed-off-by: Marco Felsch <redacted>
---
 .../devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml   | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml
index a157eecfb5fc..bb9a7d16db60 100644
--- a/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml
+++ b/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml

@@ -22,6 +22,9 @@ properties:
     description: SPI chip select
     maxItems: 1
 
+  spi-cpol: true
+  spi-cpha: true
+
 required:
   - compatible
   - reg

-- 
2.39.2