On 29/02/2024 16:54, Frank Li wrote:

On Thu, Feb 29, 2024 at 10:49:43AM +0100, Krzysztof Kozlowski wrote:

quoted

On 27/02/2024 18:21, Frank Li wrote:

quoted

 
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: fsl,imx8ulp-edma
+    then:
+      properties:
+        clock:
+          maxItems: 33
+        clock-names:
+          items:
+            - const: dma
+            - pattern: "^CH[0-31]-clk$"
+        interrupt-names: false
+        interrupts:
+          maxItems: 32
+        "#dma-cells":
+          const: 3

Why suddenly fsl,vf610-edma can have from 2 to 33 clocks? Constrain
properly the variants.

Suppose you talk about 'fsl,imx8ulp-edma' instead 'fsl,vf610-edma'.

imx8ulp each channel have one clk, there are 32 channel. 1 channel for core
controller. So max became 32.

I can add above information in commit message.

No, I meant Vybrid. Quick look at this code and the actual file suggest
that you allow vybrid with 30-whatever clocks. Test it.

Best regards,
Krzysztof