On Fri, Oct 27, 2023 at 01:25:56PM +0200, Krzysztof Kozlowski wrote:

On 27/10/2023 11:09, Wolfram Sang wrote:

quoted

On Fri, Oct 27, 2023 at 04:31:03PM +1300, Chris Packham wrote:

quoted

Add bus-reset-gpios and bus-reset-duration-us properties to the
marvell,mv64xxx-i2c binding. These can be used to describe hardware
where a common reset GPIO is connected to all downstream devices on and
I2C bus. This reset will be asserted then released before the downstream
devices on the bus are probed.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Krzysztof Kozlowski <redacted>

Krzysztof, are you fine with this change?

Actually no. NAK.

Not because of the naming, but because the new name triggered some new
paths in my brain which brought the point - this is old problem of power
sequencing of children.

I believe this must be solved in more generic way. First - generic for
all I2C devices. Second - generic also matching other buses/subsystems,
which have similar problem. We did it for USB (onboard USB), MMC
(unloved MMC power sequence) and now we are doing it for PCIe and few
others (Cc: Abel)

Unlike the others I2C doesn't expect to access the bus/device before 
devices probe, right?

https://lpc.events/event/17/contributions/1507/

Oh, good!

Current solution is heavily limited. What about regulators? What about
buses having 2 reset lines (still the same bus)? What about sequence?

A more complicated case should be handled by the device's driver. If the 
GPIO reset was not shared we'd be handling it there too. I think what's 
needed is to solve the shared aspect. That's already done with reset 
subsys, so I think making 'reset-gpios' handled by it too is the way 
forward. That would handle the QCA WiFi/BT case I think.

I'm not sure waiting for that or something else to happen is worth 
holding up this simple case. It's not the only case of a common reset 
for a bus (MDIO).

Rob