Thread (17 messages) 17 messages, 4 authors, 2023-04-03

Re: [PATCH v2 1/3] dt-bindings: phy: Add starfive,jh7110-dphy-rx

From: Changhuang Liang <changhuang.liang@starfivetech.com>
Date: 2023-02-28 08:58:06
Also in: linux-phy, linux-riscv, lkml


On 2023/2/28 2:34, Rob Herring wrote:
On Wed, Feb 22, 2023 at 05:59:50PM -0800, Changhuang Liang wrote:
[...]
quoted
+
+  clocks:
+    maxItems: 3
+
+  clock-names:
+    items:
+      - const: cfg
+      - const: ref
+      - const: tx
Should be 'rx' given this is the 'rx' block? A description of each clock 
in 'clocks' would be good.
'tx': This clock is directly used to generate transmit escape sequences, 
will add description of each clock in 'clocks'.
quoted
+
+  resets:
+    items:
+      - description: DPHY_HW reset
+      - description: DPHY_B09_ALWAYS_ON reset
+
+  starfive,aon-syscon:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    items:
+      items:
- items: ?

Otherwise, multiple 2 cell entries are allowed. Is that intended?
Will change to:
items:
  - items:
quoted
+        - description: phandle of AON SYSCON
+        - description: register offset
+    description: The power of dphy rx is configured by AON SYSCON
+      in this property.
quoted
+
+  "#phy-cells":
+    const: 0
+
+required:
+  - compatible
+  - reg
[...]
quoted
-- 
2.25.1
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