Re: [PATCH v2] dt-bindings: net: marvell,pp2: convert to json-schema
From: Krzysztof Kozlowski <hidden>
Date: 2022-09-28 07:50:30
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On 27/09/2022 01:21, Michał Grzelak wrote:
This converts the marvell,pp2 bindings from text to proper schema. Move 'marvell,system-controller' and 'dma-coherent' properties from port up to the controller node, to match what is actually done in DT. Signed-off-by: Michał Grzelak <redacted> --- .../devicetree/bindings/net/marvell,pp2.yaml | 241 ++++++++++++++++++ .../devicetree/bindings/net/marvell-pp2.txt | 141 ----------
Thank you for your patch. There is something to discuss/improve.
+properties: + compatible: + enum: + - marvell,armada-375-pp2 + - marvell,armada-7k-pp22 + + reg: + minItems: 3 + maxItems: 4 + description: | + For "marvell,armada-375-pp2", must contain the following register sets: + - common controller registers + - LMS registers + - one register area per Ethernet port + For "marvell,armada-7k-pp22" used by 7K/8K and CN913X, must contain the following register sets: + - packet processor registers + - networking interfaces registers + - CM3 address space used for TX Flow Control
Instead of this description, in define them for each variant in allOf:if:then (just like for clocks below)
+ + clocks: + minItems: 2 + items: + - description: main controller clock + - description: GOP clock + - description: MG clock + - description: MG Core clock + - description: AXI clock
This needs to be restricted per variant - minItems and maxItems in allOf:if:then.
+ + clock-names: + minItems: 2 + items: + - const: pp_clk + - const: gop_clk + - const: mg_clk + - const: mg_core_clk + - const: axi_clk
The same.
+ + dma-coherent: true + '#size-cells': true + '#address-cells': true
You need const:X for both cells (unless they come from some other schema but then you would not need to list them here).
+ + marvell,system-controller: + $ref: /schemas/types.yaml#/definitions/phandle + description: a phandle to the system controller. + +patternProperties: + '^eth[0-9a-f]*(@.*)?$':
The name should be "(ethernet-)?port", unless anything depends on particular naming?
+ type: object
You need description here.
+ properties: + interrupts: + minItems: 1 + maxItems: 10 + description: interrupt(s) for the port + + interrupt-names: + items:
minItems: 1
+ - const: hif0 + - const: hif1 + - const: hif2 + - const: hif3 + - const: hif4 + - const: hif5 + - const: hif6 + - const: hif7 + - const: hif8 + - const: link + + description: > + if more than a single interrupt for is given, must be the + name associated to the interrupts listed. Valid names are: + "hifX", with X in [0..8], and "link". The names "tx-cpu0", + "tx-cpu1", "tx-cpu2", "tx-cpu3" and "rx-shared" are supported + for backward compatibility but shouldn't be used for new + additions. + + port-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: ID of the port from the MAC point of view. + + phy: + $ref: /schemas/types.yaml#/definitions/phandle + description: > + a phandle to a phy node defining the PHY address + (as the reg property, a single integer). + + phy-mode: + $ref: "ethernet-controller.yaml#/properties/phy-mode"
You can skip quotes.
+ + marvell,loopback: + $ref: /schemas/types.yaml#/definitions/flag + description: port is loopback mode. + + gop-port-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: > + only for marvell,armada-7k-pp22, ID of the port from the + GOP (Group Of Ports) point of view. This ID is used to index the + per-port registers in the second register area. + + required: + - interrupts + - port-id + - phy-mode + +required: + - compatible + - reg + - clocks + - clock-names + +allOf: + - $ref: ethernet-controller.yaml# + - if: + properties: + compatible: + const: marvell,armada-7k-pp22 + then: + patternProperties: + '^eth[0-9a-f]*(@.*)?$': + required: + - gop-port-id
else:
patternProperties:
....
gop-port-id: false
+ +unevaluatedProperties: false + +examples: + - |
Best regards, Krzysztof