Xilinx ZynqMP DDRC-based example contains the opencoded numerical literals
in the IRQ lines definition. It doesn't seem justified since the
corresponding platform has well defined ARM GIC interface. Let's replace
the numbers with the corresponding macros then.

Signed-off-by: Serge Semin <redacted>

---

Changelog v2:
- This is a new patch created on v2 based on the @Krzysztof' request not
  to have the opencoded numbers in the bindings example. (@Krzysztof)
---
 .../bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml     | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml b/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml
index 9212dfe6e956..fb571d3d665d 100644
--- a/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml

@@ -47,10 +47,13 @@ additionalProperties: false
 
 examples:
   - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
     memory-controller@fd070000 {
       compatible = "xlnx,zynqmp-ddrc-2.40a";
       reg = <0xfd070000 0x30000>;
+
       interrupt-parent = <&gic>;
-      interrupts = <0 112 4>;
+      interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
     };
 ...

-- 
2.37.2