Thread (22 messages) 22 messages, 4 authors, 2022-09-08

Re: [PATCH v2 1/6] dt-bindings: sifive-ccache: change Sifive L2 cache to Composable cache

From: <Conor.Dooley@microchip.com>
Date: 2022-09-08 21:32:52
Also in: linux-edac, linux-riscv, lkml

On 08/09/2022 22:21, Rob Herring wrote:
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On Mon, 05 Sep 2022 08:31:20 +0000, Zong Li wrote:
quoted
Since composable cache may be L3 cache if private L2 cache exists, we
should use its original name Composable cache to prevent confusion.

Signed-off-by: Zong Li <redacted>
Suggested-by: Conor Dooley <conor.dooley@microchip.com>
Suggested-by: Ben Dooks <redacted>
---
 ...five-l2-cache.yaml => sifive,ccache0.yaml} | 28 +++++++++++++++----
 1 file changed, 23 insertions(+), 5 deletions(-)
 rename Documentation/devicetree/bindings/riscv/{sifive-l2-cache.yaml => sifive,ccache0.yaml} (83%)
Reviewed-by: Rob Herring <robh@kernel.org>
FWIW this was respun today:
https://lore.kernel.org/linux-riscv/20220908144424.4232-1-zong.li@sifive.com/ (local)

Content of this patch should be no different.
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