-----Original Message-----
From: Lucas Stach <l.stach@pengutronix.de>
Sent: 2022年8月31日 16:37
To: Hongxing Zhu <hongxing.zhu@nxp.com>; p.zabel@pengutronix.de;
bhelgaas@google.com; lorenzo.pieralisi@arm.com; robh@kernel.org;
shawnguo@kernel.org; vkoul@kernel.org; alexander.stein@ew.tq-group.com;
marex@denx.de; richard.leitner@linux.dev
Cc: linux-phy@lists.infradead.org; devicetree@vger.kernel.org;
linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
linux-kernel@vger.kernel.org; kernel@pengutronix.de; dl-linux-imx
[off-list ref]
Subject: Re: [PATCH v5 5/7] soc: imx: imx8mp-blk-ctrl: handle PCIe PHY resets

Am Dienstag, dem 30.08.2022 um 15:46 +0800 schrieb Richard Zhu:

quoted

From: Lucas Stach <l.stach@pengutronix.de>

Dessert the PHY reset when powering up the domain and put it back into
reset when the domain is powered down.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

According to patch submission guidelines you need to add your own sign- off
when integrating this patch into your series. Please add in the next revision.

Okay, thanks.

Best Regards
Richard Zhu

Regards,
Lucas

quoted

---
 drivers/soc/imx/imx8mp-blk-ctrl.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/soc/imx/imx8mp-blk-ctrl.c

b/drivers/soc/imx/imx8mp-blk-ctrl.c
index 4ca2ede6871b..6c939d68ba9a 100644

--- a/drivers/soc/imx/imx8mp-blk-ctrl.c
+++ b/drivers/soc/imx/imx8mp-blk-ctrl.c

@@ -18,6 +18,8 @@
 #define GPR_REG0		0x0
 #define  PCIE_CLOCK_MODULE_EN	BIT(0)
 #define  USB_CLOCK_MODULE_EN	BIT(1)
+#define  PCIE_PHY_APB_RST	BIT(4)
+#define  PCIE_PHY_INIT_RST	BIT(5)

 struct imx8mp_blk_ctrl_domain;

@@ -75,6 +77,10 @@ static void imx8mp_hsio_blk_ctrl_power_on(struct

imx8mp_blk_ctrl *bc,

quoted

 	case IMX8MP_HSIOBLK_PD_PCIE:
 		regmap_set_bits(bc->regmap, GPR_REG0,

PCIE_CLOCK_MODULE_EN);

quoted

 		break;
+	case IMX8MP_HSIOBLK_PD_PCIE_PHY:
+		regmap_set_bits(bc->regmap, GPR_REG0,
+				PCIE_PHY_APB_RST | PCIE_PHY_INIT_RST);
+		break;
 	default:
 		break;
 	}

@@ -90,6 +96,10 @@ static void imx8mp_hsio_blk_ctrl_power_off(struct

imx8mp_blk_ctrl *bc,

quoted

 	case IMX8MP_HSIOBLK_PD_PCIE:
 		regmap_clear_bits(bc->regmap, GPR_REG0,

PCIE_CLOCK_MODULE_EN);

quoted

 		break;
+	case IMX8MP_HSIOBLK_PD_PCIE_PHY:
+		regmap_clear_bits(bc->regmap, GPR_REG0,
+				  PCIE_PHY_APB_RST | PCIE_PHY_INIT_RST);
+		break;
 	default:
 		break;
 	}