[PATCH v3 2/3] arm64: dts: renesas: r9a07g044: Add fcpvd node
From: Biju Das <biju.das.jz@bp.renesas.com>
Date: 2022-08-31 10:09:31
Also in:
linux-renesas-soc
Subsystem:
arm/risc-v/renesas architecture, the rest · Maintainers:
Geert Uytterhoeven, Magnus Damm, Linus Torvalds
Possibly related (same subject, not in this thread)
- 2022-09-02 · [PATCH v3 2/3] arm64: dts: renesas: r9a07g044: Add fcpvd node · Biju Das <biju.das.jz@bp.renesas.com>
Add fcpvd node to SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 3652e511160f..fc86a5567d04 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi@@ -611,6 +611,16 @@ sbc: spi@10060000 { status = "disabled"; }; + fcpvd: fcp@10880000 { + compatible = "renesas,fcpv"; + reg = <0 0x10880000 0 0x10000>; + clocks = <&cpg CPG_MOD R9A07G044_LCDC_CLK_A>, + <&cpg CPG_MOD R9A07G044_LCDC_CLK_P>, + <&cpg CPG_MOD R9A07G044_LCDC_CLK_D>; + power-domains = <&cpg>; + resets = <&cpg R9A07G044_LCDC_RESET_N>; + }; + cpg: clock-controller@11010000 { compatible = "renesas,r9a07g044-cpg"; reg = <0 0x11010000 0 0x10000>;
--
2.25.1