Thread (7 messages) 7 messages, 4 authors, 2022-09-04

Re: [PATCH] arm64: dts: imx8mp: Add SNVS LPGPR

From: Alexander Stein <hidden>
Date: 2022-08-24 05:51:58
Also in: linux-arm-kernel

Hello Marek,

Am Dienstag, 23. August 2022, 18:56:02 CEST schrieb Marek Vasut:
quoted hunk ↗ jump to hunk
Add SNVS LPGPR bindings to MX8M Plus, the LPGPR is used to store
e.g. boot counter.

Signed-off-by: Marek Vasut <marex@denx.de>
---
Cc: Fabio Estevam <redacted>
Cc: Marcel Ziswiler <redacted>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: NXP Linux Team <redacted>
Cc: devicetree@vger.kernel.org
To: linux-arm-kernel@lists.infradead.org
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 5 +++++
 1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index
f7adcb2c14880..21689e9e68170 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -478,6 +478,11 @@ snvs_pwrkey: snvs-powerkey {
 					wakeup-source;
 					status = "disabled";
 				};
+
+				snvs_lpgpr: snvs-lpgpr {
+					compatible = 
"fsl,imx8mp-snvs-lpgpr",
+						     
"fsl,imx7d-snvs-lpgpr";
+				};
 			};

 			clk: clock-controller@30380000 {
Do you have any information that the i.MX8M Plus actually has the HPLR 
register (at offset 0)? This is used in snvs_lpgpr_write. I can't find it in 
the RM, although GPR_SL is referenced in LPGPRx register description.

Best regards,
Alexander


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