Thread (15 messages) 15 messages, 4 authors, 2022-08-23

Re: [PATCH v2 0/6] fsys0/1 clock support for Exynos Auto v9 SoC

From: Krzysztof Kozlowski <hidden>
Date: 2022-08-23 05:48:40
Also in: linux-arm-kernel, linux-clk, linux-samsung-soc

On 23/08/2022 05:20, Stephen Boyd wrote:
Quoting Chanho Park (2022-07-28 17:30:18)
quoted
CMU_FSYS0 block provides clocks for PCIe Gen3 1 x 4Lanes and 2 x 2
Lanes. Similarly, CMU_FSYS1 provides clocks for USB(2 x USB3.1 Gen-1,
2 x USB 2.0) and mmc. For MMC clocks, PLL_MMC(PLL0831X type) is also
supported as a PLL source clock provider.
Is someone at Samsung going to pick up the Samsung clk driver patches
and send them as a PR? I didn't see anything last cycle.
I found few other patches which were not applied:
https://patchwork.kernel.org/project/linux-samsung-soc/list/?series=666278
https://patchwork.kernel.org/project/linux-samsung-soc/patch/20220307033546.2075097-1-chi.minghao@zte.com.cn/
https://patchwork.kernel.org/project/linux-samsung-soc/list/?series=646690
https://patchwork.kernel.org/project/linux-samsung-soc/list/?series=654542

I'll take all these to Samsung SoC and send to you Stephen. If anyone
has objections or other ideas, feel free to propose other way.

Best regards,
Krzysztof
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