RE: [PATCH v3 5/5] pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interrupt
From: Biju Das <biju.das.jz@bp.renesas.com>
Date: 2022-05-16 07:20:56
Also in:
linux-gpio, linux-renesas-soc, lkml
Hi Marc, Thanks for the feedback.
Subject: Re: [PATCH v3 5/5] pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interrupt On Sun, 15 May 2022 06:13:22 +0100, Biju Das [off-list ref] wrote:quoted
Hi Prabhakar, Thanks for the example.quoted
Subject: Re: [PATCH v3 5/5] pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interruptquoted
But "offset" is a number from the GPIO offset space (0-122), whileThe "offset" reported by kernel is 120-511: root@smarc-rzg2l:~# cat /sys/kernel/debug/gpio gpiochip0: GPIOs 120-511, parent: platform/11030000.pinctrl, 11030000.pinctrl: gpio-120 (P0_0 ) gpio-121 (P0_1 ) gpio-122 (P0_2 ) gpio-123 (P0_3 ) gpio-124 (P0_4 ) ..... gpio-507 (P48_3 ) gpio-508 (P48_4 ) gpio-509 (P48_5 ) gpio-510 (P48_6 ) gpio-511 (P48_7 )quoted
irq_find_mapping() expects a number from the domain's IRQ space, which is only 0-31?Nope, let me demonstrate with an example, I have configured the gpio pins as GPIO keys in DTS: + keyboard { + compatible = "gpio-keys"; + status = "okay"; + + key-1 { + gpios = <&pinctrl RZG2L_GPIO(43, 0) GPIO_ACTIVE_HIGH>; + linux,code = <KEY_1>; + linux,input-type = <EV_KEY>; + wakeup-source; + label = "SW1"; + }; + + key-2 { + gpios = <&pinctrl RZG2L_GPIO(41, 0) GPIO_ACTIVE_HIGH>; + linux,code = <KEY_2>; + linux,input-type = <EV_KEY>; + wakeup-source; + label = "SW2"; + }; + + key-3 { + gpios = <&pinctrl RZG2L_GPIO(43, 1) GPIO_ACTIVE_HIGH>; + linux,code = <KEY_3>; + linux,input-type = <EV_KEY>; + wakeup-source; + label = "SW3"; + }; + }; root@smarc-rzg2l:~# cat /proc/interrupts | grep SW root@smarc-rzg2l:~# root@smarc-rzg2l:~# insmod gpio_keys.ko [ 925.002720] input: keyboard as /devices/platform/keyboard/input/input3 root@smarc-rzg2l:~# cat /proc/interrupts | grep SW 82: 0 0 11030000.pinctrl 344 Edge SW1 83: 0 0 11030000.pinctrl 328 Edge SW2 84: 0 0 11030000.pinctrl 345 Edge SW3 root@smarc-rzg2l:~# In here 82/83/84 are virq and 344/328/345 are hwirq, which can be confirmed from sysfs file:From your example, Looks like I believe from interrupt statistics point of view, cat /proc/interrupts should report actual gpioint number (0->122) corresponding to pin index for SW1, SW2 and SW3 ??No. There is no need for such userspace-visible behaviour. Userspace has no business tracking those. The required information is in debugfs, and that more than enough.
Ok, So far I used cat /proc/interrupts for debugging, since I don't need to enable DEBUG config for
Enabling Debugfs for irq. This Debugfs irq is new info to me.
Our hardware manual has below info for usb-phy irq
2H0_OBINT 126(InterruptID) SPI 94 IRQ 94 Level
cat /proc/interrupts matches with GICV3 Interrupt ID/ type in the HW manual
113: 0 0 GICv3 126 Level 11c50200.usb-phy
Debugfs is also showing similar info like hwirq and interrupt type. But I don't know which field corresponds to number
of interrupts?
root@smarc-rzg2l:~# cat /sys/kernel/debug/irq/irqs/113
handler: handle_fasteoi_irq
device: (null)
status: 0x00000104
istate: 0x00000000
ddepth: 0
wdepth: 0
dstate: 0x13402204
IRQ_TYPE_LEVEL_HIGH
IRQD_LEVEL
IRQD_ACTIVATED
IRQD_IRQ_STARTED
IRQD_SINGLE_TARGET
IRQD_DEFAULT_TRIGGER_SET
IRQD_HANDLE_ENFORCE_IRQCTX
node: 0
affinity: 0-1
effectiv: 0
domain: :soc:interrupt-controller@11900000-1
hwirq: 0x7e
chip: GICv3
flags: 0x15
IRQCHIP_SET_TYPE_MASKED
IRQCHIP_MASK_ON_SUSPEND
IRQCHIP_SKIP_SET_WAKE
Now coming to current case,
Currently GPIO INT 0-122(123 interrupts) corresponding to 120-511(291 interrupts) with same invalid lines.
From a debugging point, If user has put same irq name for gpioints(cat /proc/interrupts case), then how do we distinguish these interrupts??
(using hwirq??)
For using Debugfs, Do we need to first execute cat /proc/interrupts to get virq and from there we need to use virq to get statistics, right?
Cheers,
Biju