Thread (72 messages) 72 messages, 6 authors, 2022-03-29

Re: [PATCH v4 03/22] arm64: dts: mt8192: Add gce node

From: Nícolas F. R. A. Prado <hidden>
Date: 2022-03-29 20:11:40
Also in: linux-arm-kernel, linux-mediatek, lkml

On Wed, Mar 23, 2022 at 06:24:03PM +0100, Matthias Brugger wrote:

On 18/03/2022 15:45, Allen-KH Cheng wrote:
quoted
Add gce node for mt8192 SoC.

Signed-off-by: Allen-KH Cheng <redacted>
Reviewed-by: Nícolas F. R. A. Prado <redacted>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
  arch/arm64/boot/dts/mediatek/mt8192.dtsi | 10 ++++++++++
  1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 0f9f211ca986..9e1b563bebab 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -6,6 +6,7 @@
  /dts-v1/;
  #include <dt-bindings/clock/mt8192-clk.h>
+#include <dt-bindings/gce/mt8192-gce.h>
  #include <dt-bindings/interrupt-controller/arm-gic.h>
  #include <dt-bindings/interrupt-controller/irq.h>
  #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
@@ -552,6 +553,15 @@
  			#size-cells = <0>;
  		};
+		gce: mailbox@10228000 {
+			compatible = "mediatek,mt8192-gce";
+			reg = <0 0x10228000 0 0x4000>;
+			interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 0>;
+			#mbox-cells = <3>;
#mbox-cells should be 2, right?
It should indeed. The mboxes property in patch 21 should also have the third
argument ("1") dropped.

Thanks,
Nícolas
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