Supply proper cxo (RPM_SMD_BB_CLK1) and sleep_clk to the gcc clock
controller node.
Signed-off-by: Dmitry Baryshkov <redacted>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 91bc974aeb0a..7a46f0f67cbb 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -679,8 +679,10 @@ gcc: clock-controller@300000 {
#power-domain-cells = <1>;
reg = <0x00300000 0x90000>;
- clocks = <&rpmcc RPM_SMD_LN_BB_CLK>;
- clock-names = "cxo2";
+ clocks = <&rpmcc RPM_SMD_BB_CLK1>,
+ <&rpmcc RPM_SMD_LN_BB_CLK>,
+ <&sleep_clk>;
+ clock-names = "cxo", "cxo2", "sleep_clk";
};
tsens0: thermal-sensor@4a9000 {--
2.34.1