Re: [PATCH v2 1/2] clk: si5351: Add DT property for phase offset
From: Stephen Boyd <sboyd@kernel.org>
Date: 2021-12-17 01:50:58
Also in:
linux-clk
Quoting Jens Renner (2021-12-08 07:45:35)
quoted hunk ↗ jump to hunk
Add optional output clock DT property "silabs,clock-phase" to configure the phase offset in degrees with respect to other clock outputs. Add missing description for related optional output clock DT property "clock-frequency". Signed-off-by: Jens Renner <redacted> --- Changes in v2: - Use vendor-specific DT property silabs,clock-phase .../devicetree/bindings/clock/silabs,si5351.txt | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)diff --git a/Documentation/devicetree/bindings/clock/silabs,si5351.txt b/Documentation/devicetree/bindings/clock/silabs,si5351.txt index bfda6af76..0f4e4f41f 100644 --- a/Documentation/devicetree/bindings/clock/silabs,si5351.txt +++ b/Documentation/devicetree/bindings/clock/silabs,si5351.txt@@ -50,11 +50,17 @@ Optional child node properties: divider. - silabs,pll-master: boolean, multisynth can change pll frequency. - silabs,pll-reset: boolean, clock output can reset its pll. -- silabs,disable-state : clock output disable state, shall be +- silabs,disable-state: clock output disable state, shall be 0 = clock output is driven LOW when disabled 1 = clock output is driven HIGH when disabled 2 = clock output is FLOATING (HIGH-Z) when disabled 3 = clock output is NEVER disabled +- clock-frequency: integer in Hz, output frequency to generate (2500-200000000)
Is this assigned-clock-rates?
+ This defines the output frequency set during boot. It can be reprogrammed + duing runtime through the common clock framework. +- silabs,clock-phase: integer, phase shift in degrees (0-359), using the
Do we need an assigned-clock-phase property?
+ multisynth initial phase offset register (depends on the clock source / + output ratio) and the clock output inverter (180 deg. only).