On Wed, 17 Nov 2021 14:48:42 +0000, Jean-Philippe Brucker wrote:
Add devicetree binding for the SMMUv3 PMU, called Performance Monitoring
Counter Group (PMCG) in the spec. Each SMMUv3 implementation can have
multiple independent PMCGs, for example one for the Translation Control
Unit (TCU) and one per Translation Buffer Unit (TBU).
Since v1 [1]:
* Fixed warnings in the binding doc
* Removed hip08 support
* Merged Robin's version. I took the liberty of splitting the driver
patch into 2 and 3. One fix in patch 3, and whitespace changes (the
driver uses spaces instead of tabs to align #define values, which I
was going to fix but actually seems more common across the tree.)
[...]
Applied to arm64 (for-next/perf-smmu), thanks!
[1/3] dt-bindings: Add Arm SMMUv3 PMCG binding
https://git.kernel.org/arm64/c/2704e7594383
[2/3] perf/smmuv3: Add devicetree support
https://git.kernel.org/arm64/c/3f7be4356176
[3/3] perf/smmuv3: Synthesize IIDR from CoreSight ID registers
https://git.kernel.org/arm64/c/df457ca973fe
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev