On Sun, Dec 12, 2021 at 07:50:25PM +0100, Krzysztof Kozlowski wrote:

On 10/12/2021 17:47, Thierry Reding wrote:

quoted

From: Thierry Reding <redacted>

The #interconnect-cells properties are required to hook up memory
clients to the MC/EMC in interconnects properties. Add a description for
these properties.

Also, allow multiple reg and interrupt entries required by Tegra194 and
later.

I think number of interrupts is fixed and you do not change them for
newer SoC, so the message is a little bit not precise. Also the subject
does not it the patch - maybe something like - "adjust properties for
Tegra196"?

Yeah, I forgot to update the commit message after making the changes in
v2. I'll send out v3 with an updated commit message.

Thanks,
Thierry