Hi Geert,

Subject: Re: [PATCH v4 2/2] dt-bindings: mmc: renesas,sdhi: Document
RZ/G2L bindings

Hi Biju,

On Tue, Aug 17, 2021 at 11:03 AM Biju Das [off-list ref]
wrote:

quoted

Document RZ/G2L SDHI controller bindings.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Thanks for your patch, which is now commit bfadee4554c3782b
("dt-bindings: mmc: renesas,sdhi: Document RZ/G2L bindings") in v5.15.

quoted

--- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
+++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml

@@ -44,19 +44,20 @@ properties:
           - const: renesas,sdhi-mmc-r8a77470 # RZ/G1C (SDHI/MMC IP)
       - items:
           - enum:
-              - renesas,sdhi-r8a774a1 # RZ/G2M
-              - renesas,sdhi-r8a774b1 # RZ/G2N
-              - renesas,sdhi-r8a774c0 # RZ/G2E
-              - renesas,sdhi-r8a774e1 # RZ/G2H
-              - renesas,sdhi-r8a7795  # R-Car H3
-              - renesas,sdhi-r8a7796  # R-Car M3-W
-              - renesas,sdhi-r8a77961 # R-Car M3-W+
-              - renesas,sdhi-r8a77965 # R-Car M3-N
-              - renesas,sdhi-r8a77970 # R-Car V3M
-              - renesas,sdhi-r8a77980 # R-Car V3H
-              - renesas,sdhi-r8a77990 # R-Car E3
-              - renesas,sdhi-r8a77995 # R-Car D3
-              - renesas,sdhi-r8a779a0 # R-Car V3U
+              - renesas,sdhi-r8a774a1  # RZ/G2M
+              - renesas,sdhi-r8a774b1  # RZ/G2N
+              - renesas,sdhi-r8a774c0  # RZ/G2E
+              - renesas,sdhi-r8a774e1  # RZ/G2H
+              - renesas,sdhi-r8a7795   # R-Car H3
+              - renesas,sdhi-r8a7796   # R-Car M3-W
+              - renesas,sdhi-r8a77961  # R-Car M3-W+
+              - renesas,sdhi-r8a77965  # R-Car M3-N
+              - renesas,sdhi-r8a77970  # R-Car V3M
+              - renesas,sdhi-r8a77980  # R-Car V3H
+              - renesas,sdhi-r8a77990  # R-Car E3
+              - renesas,sdhi-r8a77995  # R-Car D3
+              - renesas,sdhi-r8a779a0  # R-Car V3U
+              - renesas,sdhi-r9a07g044 # RZ/G2{L,LC}
           - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2

I don't think SDHI on RZ/G2L is fully compatible with SDHI on R-Car
Gen3...

It is is same IP, it has 2 main clk(core clocks), 1 high speed clock and 1 bus clock.
Core clocks are same running at 133MHz, High speed clock is at 533 MHz(133 x4) and bus clock 
At 200MHz.

quoted

   reg:

@@ -66,15 +67,9 @@ properties:
     minItems: 1
     maxItems: 3

-  clocks:
-    minItems: 1
-    maxItems: 2
+  clocks: true

-  clock-names:
-    minItems: 1
-    items:
-      - const: core
-      - const: cd
+  clock-names: true

   dmas:
     minItems: 4

@@ -108,6 +103,42 @@ properties:
 allOf:
   - $ref: "mmc-controller.yaml"

+  - if:
+      properties:
+        compatible:
+          contains:
+            const: renesas,sdhi-r9a07g044
+    then:
+      properties:
+        clocks:
+          items:
+            - description: IMCLK, SDHI channel main clock1.
+            - description: IMCLK2, SDHI channel main clock2. When this

clock is

quoted

+                           turned off, external SD card detection

cannot be

quoted

+                           detected.
+            - description: CLK_HS, SDHI channel High speed clock which

operates

quoted

+                           4 times that of SDHI channel main clock1.
+            - description: ACLK, SDHI channel bus clock.
+        clock-names:
+          items:
+            - const: imclk
+            - const: imclk2
+            - const: clk_hs
+            - const: aclk
+      required:
+        - clock-names
+        - resets
+    else:
+      properties:
+        clocks:
+          minItems: 1
+          maxItems: 2
+        clock-names:
+          minItems: 1
+          items:
+            - const: core
+            - const: cd
+
   - if:
       properties:
         compatible:

... as the clock handling is completely different.

Does this actually work with the current Linux SDHI driver? How are the
extra clocks handled?

Yes, it works. Extra clocks are by PM framework. We added mutli-clock handling[1] in clock PM.

[1]:- https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/clk/renesas/rzg2l-cpg.c?h=v5.15#n585

First clock is core-clk[2], so it gets rate.

[2]https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/mmc/host/renesas_sdhi_core.c?h=v5.15#n906

I need to apply the latest patch series from Wolfram to check, the introduction of SDH clock breaks anything on
RZ/G2L.

Regards,
biju

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
m68k.org

In personal conversations with technical people, I call myself a hacker.
But when I'm talking to journalists I just say "programmer" or something
like that.
                                -- Linus Torvalds