[PATCH 3/3] arm64: dt: qcom: sm6125.dtsi: Add dispcc
From: Martin Botka <hidden>
Date: 2021-11-30 21:24:29
Also in:
linux-arm-msm, linux-clk, lkml
Subsystem:
arm/qualcomm mailing list, arm/qualcomm support, the rest · Maintainers:
Bjorn Andersson, Konrad Dybcio, Linus Torvalds
Add the dispcc node from the newly added DISPCC driver for Qualcomm Technology Inc's SM6125 SoC. Signed-off-by: Martin Botka <redacted> --- arch/arm64/boot/dts/qcom/sm6125.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
index 51286ddbdb10..78f4705e4117 100644
--- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi@@ -3,6 +3,7 @@ * Copyright (c) 2021, Martin Botka <martin.botka@somainline.org> */ +#include <dt-bindings/clock/qcom,dispcc-sm6125.h> #include <dt-bindings/clock/qcom,gcc-sm6125.h> #include <dt-bindings/clock/qcom,rpmcc.h> #include <dt-bindings/gpio/gpio.h>
@@ -317,6 +318,17 @@ soc { ranges = <0x00 0x00 0x00 0xffffffff>; compatible = "simple-bus"; + dispcc: clock-controller@5f00000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "qcom,dispcc-sm6125"; + reg = <0x5f00000 0x20000>; + clocks = <&gcc GCC_DISP_AHB_CLK>; + clock-names = "cfg_ahb_clk"; + #clock-cells = <1>; + #power-domain-cells = <1>; + }; + tcsr_mutex: hwlock@340000 { compatible = "qcom,tcsr-mutex"; reg = <0x00340000 0x20000>;
--
2.34.0