[PATCH 2/2] dt-bindings: net: dsa: qca8k: improve port definition documentation
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: 2021-11-12 16:58:12
Also in:
lkml, netdev
Subsystem:
networking drivers, networking [dsa], open firmware and flattened device tree bindings, the rest · Maintainers:
Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Andrew Lunn, Vladimir Oltean, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Clean and improve port definition for qca8k documentation by referencing the dsa generic port definition and adding the additional specific port definition. Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> --- .../devicetree/bindings/net/dsa/qca8k.yaml | 82 ++++++------------- 1 file changed, 23 insertions(+), 59 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/dsa/qca8k.yaml b/Documentation/devicetree/bindings/net/dsa/qca8k.yaml
index 48de0ace265d..9eb24cdf6cd4 100644
--- a/Documentation/devicetree/bindings/net/dsa/qca8k.yaml
+++ b/Documentation/devicetree/bindings/net/dsa/qca8k.yaml@@ -99,65 +99,29 @@ patternProperties: type: object description: Ethernet switch ports - properties: - reg: - description: Port number - - label: - description: - Describes the label associated with this port, which will become - the netdev name - $ref: /schemas/types.yaml#/definitions/string - - link: - description: - Should be a list of phandles to other switch's DSA port. This - port is used as the outgoing port towards the phandle ports. The - full routing information must be given, not just the one hop - routes to neighbouring switches - $ref: /schemas/types.yaml#/definitions/phandle-array - - ethernet: - description: - Should be a phandle to a valid Ethernet device node. This host - device is what the switch port is connected to - $ref: /schemas/types.yaml#/definitions/phandle - - phy-handle: true - - phy-mode: true - - fixed-link: true - - mac-address: true - - sfp: true - - qca,sgmii-rxclk-falling-edge: - $ref: /schemas/types.yaml#/definitions/flag - description: - Set the receive clock phase to falling edge. Mostly commonly used on - the QCA8327 with CPU port 0 set to SGMII. - - qca,sgmii-txclk-falling-edge: - $ref: /schemas/types.yaml#/definitions/flag - description: - Set the transmit clock phase to falling edge. - - qca,sgmii-enable-pll: - $ref: /schemas/types.yaml#/definitions/flag - description: - For SGMII CPU port, explicitly enable PLL, TX and RX chain along with - Signal Detection. On the QCA8327 this should not be enabled, otherwise - the SGMII port will not initialize. When used on the QCA8337, revision 3 - or greater, a warning will be displayed. When the CPU port is set to - SGMII on the QCA8337, it is advised to set this unless a communication - issue is observed. - - required: - - reg - - additionalProperties: false + allOf: + - $ref: dsa-port.yaml# + - properties: + qca,sgmii-rxclk-falling-edge: + $ref: /schemas/types.yaml#/definitions/flag + description: + Set the receive clock phase to falling edge. Mostly commonly used on + the QCA8327 with CPU port 0 set to SGMII. + + qca,sgmii-txclk-falling-edge: + $ref: /schemas/types.yaml#/definitions/flag + description: + Set the transmit clock phase to falling edge. + + qca,sgmii-enable-pll: + $ref: /schemas/types.yaml#/definitions/flag + description: + For SGMII CPU port, explicitly enable PLL, TX and RX chain along with + Signal Detection. On the QCA8327 this should not be enabled, otherwise + the SGMII port will not initialize. When used on the QCA8337, revision 3 + or greater, a warning will be displayed. When the CPU port is set to + SGMII on the QCA8337, it is advised to set this unless a communication + issue is observed. oneOf: - required:
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2.32.0