Re: [PATCH 7/8] arm64: dts: qcom: msm8996: Add MSM8996 Pro support

On Fri, Oct 15 2021 at 23:01:54 +0400, Konrad Dybcio 
[off-list ref] wrote:

On 14.10.2021 10:32, Yassine Oudjana wrote:

quoted

 Add a new DTSI for MSM8996 Pro (MSM8996SG) with msm-id and CPU/GPU 
OPPs.
 CBF OPPs and CPR parameters will be added to it as well once 
support for
 CBF scaling and CPR is introduced.

 Signed-off-by: Yassine Oudjana [off-list ref]
 ---
  arch/arm64/boot/dts/qcom/msm8996.dtsi    |  82 +++----
  arch/arm64/boot/dts/qcom/msm8996pro.dtsi | 281 
+++++++++++++++++++++++
  2 files changed, 322 insertions(+), 41 deletions(-)
  create mode 100644 arch/arm64/boot/dts/qcom/msm8996pro.dtsi

 diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi 
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
 index 94a846c3f1ee..5b2600a4fb2a 100644
 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
 +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
 @@ -142,82 +142,82 @@ cluster0_opp: opp_table0 {
  		/* Nominal fmax for now */
  		opp-307200000 {
  			opp-hz = /bits/ 64 <307200000>;
 -			opp-supported-hw = <0x77>;
 +			opp-supported-hw = <0x7>;

You didn't describe what's the reason for changing this everywhere.

If it's been always broken, perhaps make it a separate commit 
describing

the issue.


Konrad

Before removing reading msm-id in qcom_cpufreq_nvmem, bits 0-2 (0x07) 
were MSM8996 speed bins, while bits 4-6 (0x70) were MSM8996 Pro speed 
bins. Now, only bits 0-2 are used for either one, so basically I moved 
bits 4-6 into msm8996pro.dtsi after shifting them right to become bits 
0-2.

I'll put this in a separate patch and describe the change.

	Yassine