Re: [PATCH] dt-bindings: bus: add palmbus device tree bindings
From: Rob Herring <robh@kernel.org>
Date: 2021-10-16 14:25:04
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On Fri, Oct 15, 2021 at 09:17:41PM +0200, Sergio Paracuellos wrote:
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Add device tree bindings for palmbus controller present in all the MIPS ralink based SoCs. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> --- .../devicetree/bindings/bus/palmbus.yaml | 81 +++++++++++++++++++ 1 file changed, 81 insertions(+) create mode 100644 Documentation/devicetree/bindings/bus/palmbus.yamldiff --git a/Documentation/devicetree/bindings/bus/palmbus.yaml b/Documentation/devicetree/bindings/bus/palmbus.yaml new file mode 100644 index 000000000000..d5159a4f3cf8 --- /dev/null +++ b/Documentation/devicetree/bindings/bus/palmbus.yaml@@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/palmbus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ralink PalmBus Device Tree Bindings + +maintainers: + - Sergio Paracuellos <sergio.paracuellos@gmail.com> + +description: | + The ralink palmbus controller can be found in all ralink MIPS + SoCs. It provides an external bus for connecting multiple + external devices to the SoC. + +properties: + $nodename: + pattern: "^palmbus(@[0-9a-f]+)?$" + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + compatible: + const: palmbus + + reg: + maxItems: 1 + + ranges: true + +patternProperties: + # All other properties should be child nodes with unit-address and 'reg' + "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-fA-F]+$":
The node name pattern is already checked elsewhere. You only need to define the unit-address part which should be lowercase hex. So just: '@[0-9a-f]+$'
+ type: object
+ properties:
+ reg:
+ maxItems: 1
+
+ required:
+ - reg
+
+required:
+ - compatible
+ - reg
+ - "#address-cells"
+ - "#size-cells"
+ - ranges
+
+additionalProperties: false
+
+examples:
+ - |
+ palmbus@1e000000 {
+ compatible = "palmbus";
+ reg = <0x1e000000 0x100000>
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e000000 0x0fffff>;
+
+ syscon@0 {
+ compatible = "mediatek,mt7621-sysc", "syscon";
+ reg = <0x0 0x100>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ ralink,memctl = <&memc>;
+ clock-output-names = "xtal", "cpu", "bus",
+ "50m", "125m", "150m",
+ "250m", "270m";
+ };
+
+ wdt@100 {
+ compatible = "mediatek,mt7621-wdt";
+ reg = <0x100 0x100>;
+ };
+ };
+
+...
--
2.33.0