-----Original Message-----
From: Lucas Stach <l.stach@pengutronix.de>
Sent: Monday, September 27, 2021 4:33 PM
To: Richard Zhu <hongxing.zhu@nxp.com>; kishon@ti.com; vkoul@kernel.org;
robh@kernel.org; galak@kernel.crashing.org; shawnguo@kernel.org
Cc: linux-phy@lists.infradead.org; devicetree@vger.kernel.org;
linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
kernel@pengutronix.de; dl-linux-imx [off-list ref]
Subject: Re: [PATCH v2 2/4] dt-bindings: phy: add imx8 pcie phy driver support

Am Sonntag, dem 26.09.2021 um 15:39 +0800 schrieb Richard Zhu:

quoted

Add dt-binding for the standalone i.MX8 PCIe PHY driver.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 .../bindings/phy/fsl,imx8-pcie-phy.yaml       | 67

+++++++++++++++++++

quoted

 1 file changed, 67 insertions(+)
 create mode 100644
Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml

diff --git
a/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml
b/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml
new file mode 100644
index 000000000000..fd08897fef82

--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml

@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
+---
+$id:
+https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi

+cetree.org%2Fschemas%2Fphy%2Ffsl%2Cimx8-pcie-phy.yaml%23&dat
a=04%

quoted

+7C01%7Chongxing.zhu%40nxp.com%7C7c5f7203447a4c259d9f08d981915ef
3%7C68

quoted

+6ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637683283637916778%
7CUnknown

quoted

+%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha
WwiLC

quoted

+JXVCI6Mn0%3D%7C1000&sdata=m1S7Si0nL4zveL76S%2FvpKbFFrWhJa
mFNgcVld

quoted

+Rxx82I%3D&reserved=0
+$schema:
+https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi

+cetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=04%7C01%7Cho
ngxing.

quoted

+zhu%40nxp.com%7C7c5f7203447a4c259d9f08d981915ef3%7C686ea1d3bc
2b4c6fa9

quoted

+2cd99c5c301635%7C0%7C0%7C637683283637916778%7CUnknown%7CT
WFpbGZsb3d8e

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+yJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3
D%7C1

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+000&sdata=S2uWTI603YkF68zqySbkcK32XaPEwU4%2BHuntwR%2Bkx7
g%3D&

quoted

+reserved=0
+
+title: Freescale i.MX8 SoC series PCIe PHY Device Tree Bindings
+
+maintainers:
+  - Richard Zhu [off-list ref]
+
+properties:
+  "#phy-cells":
+    const: 0
+
+  compatible:
+    enum:
+      - fsl,imx8mm-pcie-phy
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: PHY module clock
+
+  clock-names:
+    items:
+      - const: phy

The clock name should describe what it is used for in the hardware block
described by the DT node. So I would think this should be called "ref" or
something like this, as I believe this clock is really only used as the reference
clock and can be disabled when the refclock is supplied via the pad, right?

[Richard Zhu] That's right. "ref" is better. Thanks.

quoted

+
+  fsl,refclk-pad-mode:
+    description: |
+      Specifies the mode of the refclk pad used. It can be NO_USED(PHY
+      refclock is derived from SoC internal source), INPUT(PHY refclock
+      is provided externally via the refclk pad) or OUTPUT(PHY refclock
+      is derived from SoC internal source and provided on the refclk pad).
+      Refer include/dt-bindings/phy/phy-imx8-pcie.h for the constants
+      to be used.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [ 0, 1, 2 ]
+
+required:
+  - "#phy-cells"
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - fsl,refclk-pad-mode
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/imx8mm-clock.h>
+
+    pcie_phy: pcie-phy@32f00000 {
+            compatible = "fsl,imx8mm-pcie-phy";
+            reg = <0x32f00000 0x10000>;
+            clocks = <&clk IMX8MM_CLK_PCIE1_PHY>;
+            clock-names = "phy";
+            assigned-clocks = <&clk IMX8MM_CLK_PCIE1_PHY>;
+            assigned-clock-rates = <100000000>;
+            assigned-clock-parents = <&clk

IMX8MM_SYS_PLL2_100M>;

quoted

+            fsl,refclk-pad-mode = <1>;

Include the new header added in patch 1 and use the enum.

[Richard Zhu] Got that, would changed in next version. Thanks.

quoted

+            #phy-cells = <0>;
+    };
+...