[PATCH 02/10] sdhci: aspeed: Add SDR50 support
From: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Date: 2021-09-22 10:31:39
Also in:
linux-arm-kernel, linux-aspeed, linux-clk, linux-mmc, lkml, openbmc
Subsystem:
aspeed sd/mmc driver, multimedia card (mmc), secure digital (sd) and sdio subsystem, secure digital host controller interface (sdhci) driver, the rest · Maintainers:
Andrew Jeffery, Ulf Hansson, Adrian Hunter, Linus Torvalds
From the analog waveform analysis result, SD/SDIO controller of AST2600 cannot always work well with 200MHz. The upper bound stable frequency for SD/SDIO controller is 100MHz. Thus, SDR50 supported bit, instead of SDR104, in capability 2 register should be set in advance. Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> --- drivers/mmc/host/sdhci-of-aspeed.c | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/drivers/mmc/host/sdhci-of-aspeed.c b/drivers/mmc/host/sdhci-of-aspeed.c
index 6e4e132903a6..c6eaeb02e3f9 100644
--- a/drivers/mmc/host/sdhci-of-aspeed.c
+++ b/drivers/mmc/host/sdhci-of-aspeed.c@@ -35,6 +35,8 @@ #define ASPEED_SDC_CAP1_1_8V (0 * 32 + 26) /* SDIO{14,24} */ #define ASPEED_SDC_CAP2_SDR104 (1 * 32 + 1) +/* SDIO{14,24} */ +#define ASPEED_SDC_CAP2_SDR50 (1 * 32 + 0) struct aspeed_sdc { struct clk *clk;
@@ -410,11 +412,17 @@ static int aspeed_sdhci_probe(struct platform_device *pdev) sdhci_get_of_property(pdev); if (of_property_read_bool(np, "mmc-hs200-1_8v") || + of_property_read_bool(np, "sd-uhs-sdr50") || of_property_read_bool(np, "sd-uhs-sdr104")) { aspeed_sdc_set_slot_capability(host, dev->parent, ASPEED_SDC_CAP1_1_8V, true, slot); } + if (of_property_read_bool(np, "sd-uhs-sdr50")) { + aspeed_sdc_set_slot_capability(host, dev->parent, ASPEED_SDC_CAP2_SDR50, + true, slot); + } + if (of_property_read_bool(np, "sd-uhs-sdr104")) { aspeed_sdc_set_slot_capability(host, dev->parent, ASPEED_SDC_CAP2_SDR104, true, slot);
--
2.17.1