[PATCH v4 8/9] clk: cs2000-cp: freeze config during register fiddling
From: Daniel Mack <daniel@zonque.org>
Date: 2021-08-27 12:02:34
Also in:
linux-clk
Subsystem:
common clk framework, the rest · Maintainers:
Michael Turquette, Stephen Boyd, Linus Torvalds
Make sure to freeze the configuration of the chip during the programming of 32-bit registers. This avoids the processing of invalid intermediate states. Signed-off-by: Daniel Mack <daniel@zonque.org> --- drivers/clk/clk-cs2000-cp.c | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/drivers/clk/clk-cs2000-cp.c b/drivers/clk/clk-cs2000-cp.c
index 2c555a0e72b1..3aae3540e29e 100644
--- a/drivers/clk/clk-cs2000-cp.c
+++ b/drivers/clk/clk-cs2000-cp.c@@ -52,6 +52,7 @@ #define FRACNSRC_DYNAMIC (1 << 0) /* GLOBAL_CFG */ +#define FREEZE (1 << 7) #define ENDEV2 (0x1) /* FUNC_CFG1 */
@@ -337,6 +338,10 @@ static int __cs2000_set_rate(struct cs2000_priv *priv, int ch, { int ret; + ret = cs2000_bset(priv, GLOBAL_CFG, FREEZE, FREEZE); + if (ret < 0) + return ret; + ret = cs2000_select_ratio_mode(priv, rate, parent_rate); if (ret < 0) return ret;
@@ -349,6 +354,10 @@ static int __cs2000_set_rate(struct cs2000_priv *priv, int ch, if (ret < 0) return ret; + ret = cs2000_bset(priv, GLOBAL_CFG, FREEZE, 0); + if (ret < 0) + return ret; + priv->saved_rate = rate; priv->saved_parent_rate = parent_rate;
--
2.31.1