[PATCH v2 16/29] arm64: dts: renesas: Add support for M3ULCB with R-Car M3e
From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: 2021-08-12 11:24:35
Also in:
linux-arm-kernel, linux-renesas-soc
Subsystem:
arm/risc-v/renesas architecture, the rest · Maintainers:
Geert Uytterhoeven, Magnus Damm, Linus Torvalds
Add support for the Renesas R-Car Starter Kit Pro equipped with an R-Car M3e SiP. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> --- v2: - Add Reviewed-by. --- arch/arm64/boot/dts/renesas/Makefile | 1 + arch/arm64/boot/dts/renesas/r8a779m2-ulcb.dts | 45 +++++++++++++++++++ 2 files changed, 46 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/r8a779m2-ulcb.dts
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 2c542b2f1c9fe092..eb744f7876751699 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile@@ -72,6 +72,7 @@ dtb-$(CONFIG_ARCH_R8A77951) += r8a779m1-ulcb.dtb dtb-$(CONFIG_ARCH_R8A77951) += r8a779m1-ulcb-kf.dtb dtb-$(CONFIG_ARCH_R8A77961) += r8a779m2-salvator-xs.dtb +dtb-$(CONFIG_ARCH_R8A77961) += r8a779m2-ulcb.dtb dtb-$(CONFIG_ARCH_R8A77961) += r8a779m3-salvator-xs.dtb dtb-$(CONFIG_ARCH_R8A77961) += r8a779m3-ulcb.dtb
diff --git a/arch/arm64/boot/dts/renesas/r8a779m2-ulcb.dts b/arch/arm64/boot/dts/renesas/r8a779m2-ulcb.dts
new file mode 100644
index 0000000000000000..22edd2476ec40f28
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a779m2-ulcb.dts@@ -0,0 +1,45 @@ +// SPDX-License-Identifier: (GPL-2.0 or MIT) +/* + * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) with R-Car M3e + * + * Copyright (C) 2021 Glider bv + * + * Based on r8a77961-ulcb.dts + * Copyright (C) 2020 Renesas Electronics Corp. + */ + +/dts-v1/; +#include "r8a779m2.dtsi" +#include "ulcb.dtsi" + +/ { + model = "Renesas M3ULCB board based on r8a779m2"; + compatible = "renesas,m3ulcb", "renesas,r8a779m2", "renesas,r8a77961"; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x78000000>; + }; + + memory@480000000 { + device_type = "memory"; + reg = <0x4 0x80000000 0x0 0x80000000>; + }; + + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x1 0x00000000>; + }; +}; + +&du { + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 722>, + <&versaclock5 1>, + <&versaclock5 3>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.2", + "dclkin.0", "dclkin.1", "dclkin.2"; +};
--
2.25.1