On Tue, Aug 3, 2021 at 7:51 PM Lad Prabhakar
[off-list ref] wrote:

+description: |
+  The RZ/G2L Interrupt Controller is a front-end for the GIC found on Renesas RZ/G2L SoC's
+    - IRQ sense select for 8 external interrupts, mapped to 8 GIC SPI interrupts,
+    - GPIO pins used as external interrupt input pins, mapped to 32 GIC SPI interrupts,
+    - NMI edge select.

Not that we don't have weird documentation but what on earth is an
"NMI edge"???

I know about rising and falling edges, and I know about non-maskable
interrupts. But NMI edge? Maybe expand this to explain what it is?

Yours,
Linus Walleij