On Wed, 14 Jul 2021 at 18:47, Rob Herring [off-list ref] wrote:

On Thu, Jul 08, 2021 at 02:37:44PM +0300, Dmitry Baryshkov wrote:

quoted

Hi,

On Thu, 8 Jul 2021 at 13:10, Ulf Hansson [off-list ref] wrote:

quoted

- Peter (the email was bouncing)

+ Peter's kernel.org address

quoted

On Tue, 6 Jul 2021 at 13:55, Mark Brown [off-list ref] wrote:

quoted

On Tue, Jul 06, 2021 at 09:54:03AM +0200, Ulf Hansson wrote:

quoted

On Tue, 22 Jun 2021 at 00:32, Dmitry Baryshkov

quoted

quoted

Qualcomm QCA6390/1 is a family of WiFi + Bluetooth SoCs, with BT part
being controlled through the UART and WiFi being present on PCIe
bus. Both blocks share common power sources. Add device driver handling
power sequencing of QCA6390/1.

quoted

Power sequencing of discoverable buses have been discussed several
times before at LKML. The last attempt [1] I am aware of, was in 2017
from Peter Chen. I don't think there is a common solution, yet.

This feels a bit different to the power sequencing problem - it's not
exposing the individual inputs to the device but rather is a block that
manages everything but needs a bit of a kick to get things going (I'd
guess that with ACPI it'd be triggered via AML).  It's in the same space
but it's not quite the same issue I think, something that can handle
control of the individual resources might still struggle with this.

Well, to me it looks very similar to those resouses we could manage
with the mmc pwrseq, for SDIO. It's also typically the same kind of
combo-chips that moved from supporting SDIO to PCIe, for improved
performance I guess. More importantly, the same constraint to
pre-power on the device is needed to allow it to be discovered/probed.

In our case we'd definitely use pwrseq for PCIe bus and we can also
benefit from using pwrseq for serdev and for platform busses also (for
the same story of WiFi+BT chips).

I can take a look at rewriting pwrseq code to also handle the PCIe
bus. Rewriting it to be a generic lib seems like an easy task,
plugging it into PCIe code would be more fun.

Platform and serdev... Definitely even more fun.

I don't want to see pwrseq (the binding) expanded to other buses. If
that was the answer, we wouldn't be having this discussion. It was a
mistake for MMC IMO.

Let's make sure we get your point correctly. I think we have discussed
this in the past, but let's refresh our memories.

If I recall correctly, you are against the mmc pwrseq DT bindings
because we are using a separate pwrseq OF node, that we point to via a
"mmc-pwrseq" property that contains a phandle from the mmc controller
device node. Is that correct?

If we would have encoded the power sequence specific properties, from
within a child node for the mmc controller node, that would have been
okay for you, right?

If pwrseq works as a kernel library/api, then I have no issue with that.

That's what Peter Chen was trying to do. A generic interface, flexible
enough so it can be used for many similar configurations (but not
exactly the same).

Perhaps it was too generic though.

quoted

quoted

Therefore, I think it would be worth having a common solution for
this, rather than a solution per subsystem or even worse, per device.

Power sequencing requirements are inheritently per device unless we're
talking about standard connectors.

The requirements are certainly per device, but the way to manage them
doesn't have to be.

As you said above, a generic library that subsystems/drivers can call
to power on/off a discoverable device, before trying to probe it would
be a good start.

This is a solved problem on MDIO. It's quite simple. If there's a DT
node for a device you haven't discovered, then probe it anyways.

A child OF node?

Then what do you think about some common power sequence properties
that we can use in such node?

Rob

Kind regards
Uffe