Re: [PATCH v3 2/4] nvmem: qfprom: Fix up qfprom_disable_fuse_blowing() ordering

qfprom_disable_fuse_blowing() disables a bunch of resources,
and then does a few register writes in the 'conf' address
space.
It works perhaps because the resources are needed only for the
'raw' register space writes, and that the 'conf' space allows
read/writes regardless.
However that makes the code look confusing, so just move the
register writes before turning off the resources in the
function.

Signed-off-by: Rajendra Nayak <redacted>
---
 drivers/nvmem/qfprom.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/nvmem/qfprom.c b/drivers/nvmem/qfprom.c
index 81fbad5..b0ca4c6 100644
--- a/drivers/nvmem/qfprom.c
+++ b/drivers/nvmem/qfprom.c

@@ -139,6 +139,9 @@ static void qfprom_disable_fuse_blowing(const struct qfprom_priv *priv,
 {
        int ret;

+       writel(old->timer_val, priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET);
+       writel(old->accel_val, priv->qfpconf + QFPROM_ACCEL_OFFSET);
+
        /*
         * This may be a shared rail and may be able to run at a lower rate
         * when we're not blowing fuses.  At the moment, the regulator framework

@@ -159,9 +162,6 @@ static void qfprom_disable_fuse_blowing(const struct qfprom_priv *priv,
                         "Failed to set clock rate for disable (ignoring)\n");

        clk_disable_unprepare(priv->secclk);
-
-       writel(old->timer_val, priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET);
-       writel(old->accel_val, priv->qfpconf + QFPROM_ACCEL_OFFSET);
 }