Re: [PATCH 4/4] arm64: dts: ti: k3-am642-evm: Add ecap0 node
From: Nishanth Menon <nm@ti.com>
Date: 2021-07-19 16:07:55
Also in:
linux-arm-kernel, lkml
On 14:24-20210719, Lokesh Vutla wrote:
quoted hunk ↗ jump to hunk
ecap0 can be configured to use pad ECAP0_IN_APWM_OUT (D18) which has a signal connected to Pin 1 of J12 on EVM. Add support for adding this pinmux so that pwm can be observed on pin 1 of Header J12 Signed-off-by: Lokesh Vutla <redacted> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> --- arch/arm64/boot/dts/ti/k3-am642-evm.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+)diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index 030712221188..7da1238cb1d6 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts@@ -288,6 +288,12 @@ AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* (M17) OSPI0_D7 */ AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */ >; }; + + main_ecap0_pins_default: main-ecap0-pins-default { + pinctrl-single,pins = < + AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */ + >; + }; }; &main_uart0 {@@ -574,3 +580,9 @@ &pcie0_ep { num-lanes = <1>; status = "disabled"; }; + +&ecap0 { + /* PWM is available on Pin 1 of header J12 */ + pinctrl-names = "default"; + pinctrl-0 = <&main_ecap0_pins_default>; +};-- 2.30.0
Do the other ecap and pwm nodes need to be disabled since they may not be pinned out? -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D