Re: [PATCH v2 3/4] clk: renesas: r9a07g044-cpg: Add clock and reset entries for ADC
From: Geert Uytterhoeven <geert@linux-m68k.org>
Date: 2021-07-19 09:15:18
Also in:
linux-clk, linux-iio, linux-renesas-soc, lkml
On Mon, Jul 19, 2021 at 10:59 AM Lad Prabhakar [off-list ref] wrote:
Add clock and reset entries for ADC block in CPG driver. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-clk-for-v5.15.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds