[PATCH v7 3/5] dts: marvell: Enable 10G interfaces on 9130-DB and 9131-DB boards
From: <hidden>
Date: 2021-07-08 12:46:47
Also in:
linux-arm-kernel, linux-phy, lkml
Subsystem:
arm/marvell kirkwood and armada 370, 375, 38x, 39x, xp, 3700, 7k/8k, cn9130 soc support, the rest · Maintainers:
Andrew Lunn, Gregory Clement, Sebastian Hesselbarth, Linus Torvalds
From: Stefan Chulski <redacted> This patch enables eth0 10G interface on CN9130-DB paltforms and eth0 10G and eth3 10G interfaces on CN9131-DB. Signed-off-by: Stefan Chulski <redacted> Signed-off-by: Konstantin Porotchkin <redacted> --- arch/arm64/boot/dts/marvell/cn9130-db.dtsi | 2 +- arch/arm64/boot/dts/marvell/cn9131-db.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
index 34274e061958..39fc90716454 100644
--- a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi@@ -125,7 +125,7 @@ /* SLM-1521-V2, CON9 */ &cp0_eth0 { - status = "disabled"; + status = "okay"; phy-mode = "10gbase-kr"; /* Generic PHY, providing serdes lanes */ phys = <&cp0_comphy4 0>;
diff --git a/arch/arm64/boot/dts/marvell/cn9131-db.dtsi b/arch/arm64/boot/dts/marvell/cn9131-db.dtsi
index a7ab791631bc..daddab638fb8 100644
--- a/arch/arm64/boot/dts/marvell/cn9131-db.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9131-db.dtsi@@ -84,7 +84,7 @@ /* CON50 */ &cp1_eth0 { - status = "disabled"; + status = "okay"; phy-mode = "10gbase-kr"; /* Generic PHY, providing serdes lanes */ phys = <&cp1_comphy4 0>;
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2.17.1