RE: [PATCH v2] dt-bindings: dma: Document RZ/G2L bindings
From: Biju Das <biju.das.jz@bp.renesas.com>
Date: 2021-06-21 11:56:07
Also in:
dmaengine, linux-renesas-soc
Hi Geert, Thanks for the feedback.
Subject: Re: [PATCH v2] dt-bindings: dma: Document RZ/G2L bindings Hi Biju, On Wed, Jun 16, 2021 at 1:14 PM Biju Das [off-list ref] wrote:quoted
Document RZ/G2L DMAC bindings. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> --- Note:- This patch has dependency on #include <dt-bindings/clock/r9a07g044-cpg.h> file which will be in next 5.14-rc1release.quoted
v1->v2: * Made interrupt names in defined order * Removed src address and channel configuration from dma-cells. * Changed the compatibele string to "renesas,r9a07g044-dmac".Thanks for the update!quoted
--- /dev/null +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yamlquoted
+ interrupt-names: + items: + - const: ch0 + - const: ch1 + - const: ch2 + - const: ch3 + - const: ch4 + - const: ch5 + - const: ch6 + - const: ch7 + - const: ch8 + - const: ch9 + - const: ch10 + - const: ch11 + - const: ch12 + - const: ch13 + - const: ch14 + - const: ch15 + - const: errorYou may want to put the "error" interrupt first, like renesas,rcar- dmac.yaml does, to make life easier when the next SoC reuses this block, but with a different number of channels.
Sure. will fix this in V3.
With that fixed:
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
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