Hi Benjamin,

On Mon, 2021-06-28 at 15:35 +0200, Benjamin Gaignard wrote:

Le 16/04/2021 à 12:54, Lucas Stach a écrit :

quoted

Am Mittwoch, dem 07.04.2021 um 09:35 +0200 schrieb Benjamin Gaignard:

quoted

In order to be able to share the control hardware block between
VPUs use a syscon instead a ioremap it in the driver.
To keep the compatibility with older DT if 'nxp,imx8mq-vpu-ctrl'
phandle is not found look at 'ctrl' reg-name.
With the method it becomes useless to provide a list of register
names so remove it.

Sorry for putting a spoke in the wheel after many iterations of the
series.

We just discussed a way forward on how to handle the clocks and resets
provided by the blkctl block on i.MX8MM and later and it seems there is
a consensus on trying to provide virtual power domains from a blkctl
driver, controlling clocks and resets for the devices in the power
domain. I would like to avoid introducing yet another way of handling
the blkctl and thus would like to align the i.MX8MQ VPU blkctl with
what we are planning to do on the later chip generations.

CC'ing Jacky Bai and Peng Fan from NXP, as they were going to give this
virtual power domain thing a shot.

Hey guys,

I may I have miss them but I haven't see patches about power domain for IMX8MQ
VPU control block ?
Is it something that you still plan to do ?
If not, I can resend my patches where I use syscon.

Please see "soc: imx: add i.MX BLK-CTL support" [1] sent by Peng
a couple weeks ago. It adds the VPUMIX for i.MX8MM, so it seems
the best way forward is to follow that design, extending it for
i.MX8MQ.

That's still under discussion, but hopefully it will be sorted out for v5.15.

Speaking of i.MX8MM, I got a report that the Hantro G1 block mostly
work, but needs to be restricted to 1920x1080. If you could add a new
compatible and variant for that, maybe we can find someone to test it.

[1] https://lore.kernel.org/linux-arm-kernel/7683ab0b-f905-dff1-aa4f-76ad638da568@oss.nxp.com/T/#mf73fe4a13aec0a8e633a14a5d9c2d5609799acb4 (local)

Kindly,
Ezequiel