Re: [RFC v1 06/11] clk: qcom: Add display clock controller driver for SM8350

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+
+static struct pll_vco vco_table[] = {
+     { 249600000, 1750000000, 0 },
+};
+
+static const struct alpha_pll_config disp_cc_pll0_config = {
+     .l = 0x47,

Is the ".cal_l = 0x44," part from downstream not necessary?

Yes it is. I went back and forth about  'cal_l', but in the end the
only value it is ever set to is 0x44, which is also what the default
value is. So there is no need for representing it explicitly at the
moment.

Interesting, maybe it'll be required for next SoCs..

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+};
+
+static const struct alpha_pll_config disp_cc_pll1_config = {
+     .l = 0x1F,

Ditto

Sorry, ditto what?

Aah, sorry I cut out a ".cal_l  = 0x44" line while adding my comments..



Konrad